Side-channel attack resisting hardware implementations of the AES

When cryptographic primitives are implemented in live applications, they are vulnerable to a range of attacks that bypass the strict input-output access model. For instance, the radiation caused by a chip executing an AES encryption, can be measured and this signal can be used to derive the secret key efficiently.

For several years already researchers are trying to devise hardware implementation techniques that reduce or eliminate the leakage of signals that can be used by an attacker. In this talk we present our approach, based on secret sharing and multiparty computation techniques.

*Bio:*
Vincent Rijmen is a Belgian cryptographer and one of the designers of the Rijndael, the Advanced Encryption Standard. Rijmen is also the co-designer of the WHIRLPOOL cryptographic hash function, and the block ciphers Anubis, KHAZAD, Square, NOEKEON and SHARK.

In 1993, Rijmen obtained a degree in electronics engineering at the Katholieke Universiteit Leuven (K.U.Leuven). Afterwards, he was a PhD student at the ESAT/COSIC lab of the K.U.Leuven. In 1997, Rijmen finished his doctoral dissertation titled Cryptanalysis and design of iterated block ciphers.

After his PhD he did postdoctoral work at the COSIC lab, on several occasions collaborating with Dr. Joan Daemen. One of their joint projects resulted in the algorithm Rijndael, which in October 2000 was selected by the National Institute for Standards and Technology (NIST) to become the Advanced Encryption Standard (AES).

Since 1 August 2001, Rijmen has been working as chief cryptographer with Cryptomathic. From 2001–2003, Rijmen was a visiting professor at the Institute for Applied Information Processing and Communications at Graz University of Technology (Austria), and a full professor there from 2004–2007. Since October 2007, Rijmen is an associate professor (hoofddocent) at K.U.Leuven, working once again with the COSIC lab.